Consiglio Nazionale delle Ricerche

Tipo di prodottoRapporto tecnico
TitoloComputer-aided synthesis of a Bidimensional Discrete Cosine Transform chip
Anno di pubblicazione1988
Autore/iV. Rampa, G. De Micheli
Affiliazioni autoriCSTS-CNR, c/o Politecnico di Milano, Milano; CSL, Stanford Universisty, Stanford
Autori CNR e affiliazioni
  • inglese
SintesiThis paper describes the design of an integrated circuit implementing a Bidimensional Discrete Cosine Transform (BDCT). Such a circuit may be used to reduce redundancy of video information in low bit-rate transmission channels and video compression for image storage and retrieval. The chip architecture is motivated by the consideration that the BDCT equations can be solved row-by-row and column-by-column by a simpler Monodimensional DCT (MDCT). Therefore the chip structure is partitioned into three stages: the first and the last one implement MDCTs while the second stage is a shared memory array. The DCT design was achieved by means of the OLYMPUS synthesis system, an experimental suite of synthesis tools developed at Stanford University. A parametrized behavioral description of the monodimensional DCT operator was specified in a high-level language in terms of concurrent process communicating through a shared medium. The circuit layout was synthesized automatically from this description.
Lingua sintesieng
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Pagine da-
Pagine a-
Pagine totali31
Numero volume della serie/collana-
Parole chiave-
Link (URL, URI)
Titolo parallelo-
ID report/working paper-
Note/Altre informazioniComputer Systems Laboratory, Stanford University Technical Report: CSL-TR-88-363
Strutture CNR
  • IEIIT — Istituto di elettronica e di ingegneria dell'informazione e delle telecomunicazioni
Moduli CNR
    Progetti Europei-
    • Computer-aided synthesis of a Bidimensional Discrete Cosine Transform chip
      Descrizione: Published report

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